A push-pull amplifier circuit including CMOS (complementary metal oxide semiconductor) transistors is a general and often used circuit. An amplifier circuit, which may be used as an audio amplifier, is typically an analog amplifier circuit or a digital amplifier circuit. Analog amplifier circuits are generally realized using a class A amplifier circuit, a class B amplifier circuit or a class AB amplifier, and digital amplifier circuits are generally realized using a class D amplifier circuit. Since linearity of an audio amplifier circuit is considered more important than high efficiency, a linear amplifier, which is an analog amplifier, is generally used as the audio amplifier.
Class A, B and AB amplifier circuits are generally used as analog amplifier circuits because of their higher linearity. However, these classes of amplifiers use significant quantities of power when implemented as amplifiers for high output. Thus, analog amplifiers typically have the advantage of high linearity, but the disadvantage of low power efficiency. Specifically, in a class A analog amplifier, much more power is dissipated than the maximum output of the amplifier, and frequently the efficiency of the amplifier is not more than 25%. A class B push-pull amplifier, which is often used to overcome the efficiency problems of the class A amplifier, has two transistors coupled to each other in an emitter follower configuration. The class B push-pull amplifier is more efficient than the class A amplifier, but crossover distortion typically occurs in the class B push-pull amplifier when a signal level is low.
Furthermore, when the transistors included in the class B amplifier are alternately turned on and off, the transistors are easily turned on and off while small currents flow, but the transistors cannot be rapidly turned on and off while large currents flow. Therefore, since no bias current flows in the class B amplifier when the amplifier is in an idle state, it is difficult to rapidly turn the transistors on/off in a large current area and hence the total harmonic distortion (THD) is increased.
In the class AB amplifier, small currents flow when the amplifier is in a static state. These currents are much smaller than those of the class A amplifier but larger than those of the class B amplifier. As more bias current flows, the features of the class AB amplifier become more similar to those of the class A amplifier, and as less bias current flows, the features of class AB amplifiers become more similar to those of the class B amplifier.
FIG. 1 is a circuit diagram of a general differential amplifier circuit 100. FIG. 2 is a diagram that illustrates the relationship between a waveform of an output signal of the differential amplifier circuit of FIG. 1 and a pull-down transistor M6. Referring to FIG. 1, the differential amplifier circuit 100 includes a bias unit 110, a voltage control unit 120, a slew rate control unit 130, a differential amplifying unit 140, and an output unit 150. The differential amplifying unit 140 amplifies a voltage level difference between input signals PINS and NINS and outputs it through a first control node N1. The output unit 150 generates an output signal S_OUT through an output node NOUT in response to a voltage level of the first control node N1 and a voltage level of a second control node N2. When a voltage level of the input signal PINS is higher than that of the input signal NINS, the voltage level of the first control node N1 becomes low and a pull-up transistor M5 is turned on. When the pull-up transistor M5 is turned on, the output signal S_OUT rises from a low level to a high level.
Moreover, due to currents generated by a current source IB1 of the bias unit 110, transistors M7 and M8 of the voltage control unit 120 are turned on, and the voltage level of the second control node N2 remains constant at a level that maintains NMOS pull-down transistor M6 in a conductive state. Unfortunately, since the pull-down transistor M6 is kept in a conductive state while the output signal S_OUT rises from a low level to a high level, the current that flows through the pull-down transistor M6 is wasted.
A transistor M12 of the slew rate control unit 130 is in a turned-off state due to the voltage at the gates of current mirror transistors M3 and M4 of the differential amplifying unit 140. In addition, when the low level voltage of the first control node N1 is applied to a gate of a transistor M11, the transistor M11 is turned on. Then, a level of a gate of a transistor M13 becomes high, and the transistor M13 is kept in a turned-off state.
Alternatively, when the voltage level of the input signal NINS is higher than that of the input signal PINS, the voltage level of the first control node N1 is pulled high and the pull-up transistor M5 is turned off. When this occurs, the voltage level of the second control node N2 remains constant due to currents generated by the current source IB1 of the bias unit 110. A transistor M12 of the slew rate control unit 130 is in a turned-on state due to the voltage at the gates of the current mirror transistors M3 and M4. In addition, when a high level voltage of the first control node N1 is applied to the gate of the transistor M11, the transistor M11 is turned off. Then, when the level of the gate of the transistor M13 becomes low, the transistor is turned on, and a current IADD is applied to the second control node N2 through the transistors M12 and M13. When this occurs, the voltage level of the second control node N2 goes up, and the pull-down transistor M6 is turned on, and a logic level of the output signal S_OUT goes from high to low.
Because the gate voltage of the pull-down transistor M6 generally remains constant when the pull-down transistor M6 is turned on, the slew rate of the output signal S_OUT is reduced. Therefore, in the differential amplifier circuit 100 of FIG. 1, when the pull-down transistor M6 is turned on, an additional current IADD is applied to the second control node N2 to increase the voltage level of the second control node N2 such that the slew rate of the output signal S_OUT is improved. However, since the pull-down transistor M6 is kept turned on even when the pull-up transistor M5 is turned on and the output signal S_OUT is increased from a low level to a high level, the differential amplifier circuit 100 of FIG. 1 consumes significant power even during a stand-by power state. Accordingly, as illustrated by the timing diagram of FIG. 2, the pull-down transistor M6 remains conductive during low-to-high and high-to-low output switching and during stand-by. This conductive state during all three modes of operation increases the static and dynamic power of the amplifier circuit 100. Thus, as shown in FIG. 2, the pull-down transistor M6 is constantly turned on regardless of changes in the level of the output signal S_OUT, thus consuming an excessively large amount of current.